64-bit ARM assembler

[Deleted User 9295]

I think I may have asked this before, but would anybody be able to write (or at least help me write) a 64-bit ARM assembler suitable for use with BBC BASIC? Currently the only 64-bit ARM version of BBC BASIC is the iOS edition of BBCSDL, and since Apple forbids 'arbitrary code execution' an assembler for that would be pointless. But before too long there will be a need for 64-bit Android and 64-bit Raspberry Pi editions, and they really ought to incorporate an assembler.

The C source code for the current 32-bit ARM and 64-bit x86 assemblers can be found at GitHub. They represent extremes of complexity, with the ARM assembler being fairly straightforward (especially since it doesn't currently include any FP or SIMD instructions) and the x86 assembler being quite complex. I would expect a 64-bit ARM assembler to come somewhere in between.

A 'feel' for the 64-bit ARM instruction set is necessary in order to design and write an assembler, and I don't have that! Any takers?

[Deleted User 9295]

But before too long there will be a need for 64-bit Android and 64-bit Raspberry Pi editions, and they really ought to incorporate an assembler.

The need for a 64-bit ARM (AArch64) assembler has now become more urgent, because of the arrival of the new M1-based ('Apple silicon') Macs. I have already started to receive requests for a version of BBC BASIC for that platform, and it's only the lack of a suitable assembler that is the stumbling block.

Currently I have both a simple 32-bit ARM assembler used for the Android and the Raspberry Pi editions of BBC BASIC, and a more sophisticated 64-bit x86 assembler used for the Linux and MacOS editions. One or both of those could be used as the basis of an AArch64 assembler.

I know very little about 64-bit ARM assembly language myself (only that it's significantly different from the 32-bit variety) but here are some links to online references that my attention has been drawn to:

https://developer.arm.com/documentation/ddi0487/fc
https://kitoslab-eng.blogspot.com/2012/ ... oding.html
https://github.com/bmfrog2/cookbook_aarch64_assembler
https://github.com/Rprop/AArch64

So I'd be very pleased to hear from anyone who may be able to help. The assembler wouldn't necessarily have to be written in C, I'd be prepared to translate from another language (even BASIC) if that's what it takes!

[BigEd]

Thanks for the links, Richard. I'm hopeful that someone out there can help.

[gfoot]

Are you still looking? It's an interesting project for sure, and it would be an honour to work on BBC BASIC!

[Deleted User 9295]

Are you still looking? It's an interesting project for sure, and it would be an honour to work on BBC BASIC!

The only 'development' since my original post has been the discovery that even if there was a 64-bit ARM assembler it wouldn't be usable on the M1-based ('Apple Silicon') Mac because it enforces the so-called Hardened Runtime, which blocks code execution in writable memory. So with iOS also being excluded for a similar reason, that leaves only 64-bit Android and 64-bit Raspberry Pi that could benefit.

So a 64-bit ARM assembler would still be useful, and I'd be delighted to receive any contributions towards creating one, but I can't argue that it is as urgent as it once seemed to be. Having said that, the absence of a 64-bit Android edition of BBCSDL does mean, I think, that it's impossible to create an app that would meet the Play Store requirements; and it may not be too long before the Raspberry Pi OS officially transitions to 64-bits.

[Deleted User 9295]

it may not be too long before the Raspberry Pi OS officially transitions to 64-bits.

The latest announcement on that topic that I can find is here. Evidently there is still no set date for a release, but I am already starting to receive requests for a 64-bit edition of BBC BASIC for the Raspberry Pi. So can I please bump my plea for some help in creating a 64-bit ARM assembler.

[sirbod]

it wouldn't be usable on the M1-based ('Apple Silicon') Mac because it enforces the so-called Hardened Runtime, which blocks code execution in writable memory

Can you not compile with the JIT exception set in Hardened Runtime and use the JIT flag when allocating memory for the code?

[Deleted User 9295]

Can you not compile with the JIT exception set in Hardened Runtime and use the JIT flag when allocating memory for the code?

Not straightforwardly, no. The key phrase there is "when allocating memory for the code" but the BBC BASIC assembler (usually) assembles code to a block of memory reserved from the heap using DIM (i.e. in the region between LOMEM and HIMEM), not memory which is separately allocated. Thus the entire heap must be both writable and executable (at the same time) which is not possible in the Hardened Runtime.

The only workaround would be for the BASIC program not to allocate code memory using the DIM statement but instead to use SYS "mmap" (with the MAP_JIT flag), then it would have to call pthread_jit_write_protect_np to enable write-access whilst assembling and to enable execute-access whilst running. This is very different from how the BBC BASIC assembler is generally used.

An additional complication is that for an app to support the MAP_JIT flag this must be enabled in Xcode, but BBC BASIC is built using command-line tools not the Xcode GUI. Presumably there is some command-line equivalent, but I don't know what it is.

Anyway, BBC BASIC runs far better (albeit a little slower) as x86 code under Rosetta 2 emulation than it would as native M1 code, because 80-bit (long double) floats are available. As native code it would have to fall back to using 64-bit floats, with a resulting loss of precision and accuracy; this can be important in some applications.

[jgharston]

I think I may have asked this before, but would anybody be able to write (or at least help me write) a 64-bit ARM assembler suitable for use with BBC BASIC? ...
A 'feel' for the 64-bit ARM instruction set is necessary in order to design and write an assembler, and I don't have that! Any takers?

A few months ago I made a start on writing a stand-alone assembler to get my head around the instruction set architecture: link.

It's been hard as I can't seem to be able to track down what the actual binary representation of ARM64 instructions is. All the references I've tracked down give you and 80% of the needed information, and overlapping all the information still only gets to about 90%. Documents either give you instruction formats with no binary representation, or give you binary representation with no instruction format, eg: "this binary representation is ADC" or "ADC Rd,Rm,Rn{,shift #n}" but never the two in the same document, so I'm having to document the A64 instruction set as I go along.

Everything assumes you *already* *have* a working assembler - even the document that described how an assembler should work! It's like back in the 1990s when I was trying to write ZMODEM file transfer code. Ever. Single. Reference. was written telling you how to *USE* it, not how to *write* it.

Back in January I spent most of a weekend working through the night just to get to the point of gettng ADD/SUB/LOGIC/MOV implemented, and there's still bits I haven't been able to work out. There is an addressing mode called 'extending registers' that looks like ADD Rd,Rn,Rm,SEXTB #3 - but while the docs tell you what bits in the opcode store the 'SEXTB #3' nowhere does it tell you how it is stored in those bits. Is it that hard to just have the one crucial phrase of something like "b16-b18=extend, b19-b20=#n".

I'm sure there will be some sort of "break point" where everything will just start falling into place, but this is the hardest assembler/disassembler I've ever written. And I managed to write a NS32000 disassembler!

[philb]

From this document for example:

https://montcs.bloomu.edu/Information/A ... e_A.a).pdf

you have details like:

which seems like it should give you most of what you need. Of course there's also the GNU libopcodes source that you can refer to as well:

https://sourceware.org/git/?p=binutils- ... ce;hb=HEAD

[philb]

Regarding your specific question about extending, I think what you need is this section from that same document (a few pages further on):

[Deleted User 9295]

It's been hard as I can't seem to be able to track down what the actual binary representation of ARM64 instructions is.

There is, for example, ARM's own documentation, which includes binary encodings. It was linked from this very thread a few posts ago, but here it is again:

https://developer.arm.com/documentation/ddi0487/fc

I don't think a lack of information is the problem, rather an excess of information because that document is 8,248 pages long!

[BigEd]

(Crossed in the post, hoping it's helpful)

I don't know if this might help with the missing 10%, but if you can get the machine code you want out of a C compiler, you can match up the binary with the assembly. And you can do that within your browser: see for example https://godbolt.org/z/KedW96YMW where

Code: Select all

  asm("ldr W1, [X2, W3,uxtw #0]");

comes out as

Code: Select all

  b8634841

whereas

Code: Select all

  asm("ldr W1, [X2, W3,uxtw #2]");

comes out as

Code: Select all

  b8635841

(I don't know what these instructions are! I'm just pasting things in and fiddling about.)

[philb]

Yes, that's a good idea. And, although I don't know an easy way to do it in your browser, you can of course use an existing disassembler to see what a given encoding translates back to. So, picking your last example:

Code: Select all

pb@pb-desk:~$ echo ".word 0xb8635841" | aarch64-linux-gnu-as - && aarch64-linux-gnu-objdump -D a.out 
a.out:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000000000 <.text>:
   0:	b8635841 	ldr	w1, [x2, w3, uxtw #2]
pb@pb-desk:~$ 

[Deleted User 9295]

And you can do that within your browser

The online assembler I've been using to check a few AArch64 instructions is this one. You can click here to see its output for the examples you gave. The only thing I don't like about it is that if the instruction isn't valid it gives you no clue why!

[Deleted User 9295]

although I don't know an easy way to do it in your browser, you can of course use an existing disassembler to see what a given encoding translates back to.

The site I linked to disassembles as well as assembles. Try this.

[BigEd]

That's marvellous! Thanks.

[jgharston]

From this document for example:
https://montcs.bloomu.edu/Information/A ... e_A.a).pdf

Ah ha! Thanks. That must be more recent than my document, that says (C)2013 in the footer. I'd been going round and round in circles only finding things like:

Code: Select all

sz|opc|0 1 x x x|0 0|x|---Rm----|option|-imm3-|---Rn----|---Rd----| INS  Rd,Rn,Rm,extend {#n}
   0 0 ADD  (extended register)
   0 1 ADDS (extended register)
   1 0 SUB  (extended register)
   1 1 SUBS (extended register)

without ever saying how 'extended register' was encoded.

There is, for example, ARM's own documentation, which includes binary encodings. ...
https://developer.arm.com/documentation/ddi0487/fc

I don't think a lack of information is the problem, rather an excess of information because that document is 8,248 pages long!

Ah yes, That's the page with a button that says "Click Download to view." .... that doesn't do anything.

Something to browse on the laptop when it stops raining, and have a bash at some more coding.

[davidb]

Ah yes, That's the page with a button that says "Click Download to view." .... that doesn't do anything.

The "Download" they mean is the one in the light grey "toolbar" beneath the dark grey header at the top of the page. It's a drop-down menu.

The document itself is here.

[jgharston]

Ah yes, That's the page with a button that says "Click Download to view." .... that doesn't do anything.

The "Download" they mean is the one in the light grey "toolbar" beneath the dark grey header at the top of the page. It's a drop-down menu.

Ah, the one that doesn't say "download" in any manner whatsoever. Grey on a grey background with a grey border, behind a filing cabinet in the basement labelled "beware of the leopard".

[Deleted User 9295]

Message deleted.

[davidb]

I think you need your eyes tested (or your monitor calibrated):

But you had to mouse-hover over that to make it stand out like that. It would have been good if the text saying "Click download" had actually been a link to the file to download.

[Deleted User 9295]

Message deleted.

[lurkio]

If you make the browser window narrow enough, the text labels on the buttons disappear. Maybe that's the source of the confusion?

[Deleted User 9295]

If you make the browser window narrow enough, the text labels on the buttons disappear.

You're right!

[Stoppers]

I came across this thread yesterday, and (famous last words) it doesn't seem to be all that much harder than the 32-bit ARM assembler. The instructions are all still four bytes, so the ARM assembler assembler mnemonics should just work (there's no need to deal with the offsets from PC in jumps). There are over 400 instructions in Aarch64, but I used a few unix tools to extract the full set (afaics) from the DDI 0487C.a document, including their syntax.

I would start with this:

Code: Select all

// Mnemonics in here from the ARM documentation in UPPER case, assembler instructions in lower case                    
static char *mnemonics[] = {
 "ADC", "ADCS", "ADD", "ADDS", "ADR", "ADRP", "adrl", "align", "AND", "ANDS",                                          
 "ASR", "ASRV", "AT", "AUTD", "AUTDZA", "AUTD", "AUTDZB", "AUTI",
 "AUTIA171", "AUTIAS", "AUTIA", "AUTIZA", "AUTI", "AUTIB171", "AUTIBS", "AUTIB",                                       
 "AUTIZB", "B.cond", "B", "BFC", "BFI", "BFM", "BFXIL", "BIC",                                                         
 "BICS", "BL", "BLR", "BLRA", "BLRAA", "BLRA", "BLRABZ", "BR",                                                         
 "BRA", "BRAA", "BRA", "BRABZ", "BRK", "CAS", "CASA", "CASAL",
 "CASLB", "CAS", "CASA", "CASAL", "CASLH", "CAS", "CASP", "CASPA",                                                     
 "CASPL", "CA", "CAS", "CASA", "CASL", "CBNZ", "CBZ", "CCMN",                                                          
 "CCMP", "CINC", "CINV", "CLREX", "CLS", "CLZ", "CMN", "CMP",
 "CNEG", "CRC32", "CRC32", "CRC32", "CRC32X", "CRC32C", "CRC32C", "CRC32C", 
 "CRC32CX", "CSEL", "CSET", "CSETM", "CSINC", "CSINV", "CSNEG", "db", "DC", "dcb", "dcd", "dcs", "dcw",                
 "DCPS1", "DCPS2", "DCPS3", "DMB", "DRPS", "DSB", "EON", "EOR", "equb", "equd", "equq", "equs", "equw",                
 "ERET", "ERETA", "ERETAB", "ESB", "EXTR", "HINT", "HLT", "HVC",
 "IC", "ISB", "LDADD", "LDADDA", "LDADDAL", "LDADDLB", "LDADD", "LDADDA",
 "LDADDAL", "LDADDLH", "LDAD", "LDADD", "LDADDA", "LDADDL", "LDAPR", "LDAPRB",                                         
 "LDAPRH", "LDAR", "LDARB", "LDARH", "LDAXP", "LDAXR", "LDAXRB", "LDAXRH",
 "LDCLR", "LDCLRA", "LDCLRAL", "LDCLRLB", "LDCLR", "LDCLRA", "LDCLRAL", "LDCLRLH",                                     
 "LDCL", "LDCLR", "LDCLRA", "LDCLRL", "LDEOR", "LDEORA", "LDEORAL", "LDEORLB",                                         
 "LDEOR", "LDEORA", "LDEORAL", "LDEORLH", "LDEO", "LDEOR", "LDEORA", "LDEORL",                                         
 "LDLARB", "LDLARH", "LDLAR", "LDNP", "LDP", "LDPSW", "LDR", "LDRA",
 "LDRAB", "LDRB", "LDRH", "LDRSB", "LDRSH", "LDRSW", "LDSET", "LDSETA", 
 "LDSETAL", "LDSETLB", "LDSET", "LDSETA", "LDSETAL", "LDSETLH", "LDSE", "LDSET",
 "LDSETA", "LDSETL", "LDSMAX", "LDSMAXA", "LDSMAXAL", "LDSMAXLB", "LDSMAX", "LDSMAXA",                                 
 "LDSMAXAL", "LDSMAXLH", "LDSMA", "LDSMAX", "LDSMAXA", "LDSMAXL", "LDSMIN", "LDSMINA",
 "LDSMINAL", "LDSMINLB", "LDSMIN", "LDSMINA", "LDSMINAL", "LDSMINLH", "LDSMI", "LDSMIN",                               
 "LDSMINA", "LDSMINL", "LDTR", "LDTRB", "LDTRH", "LDTRSB", "LDTRSH", "LDTRSW", 
 "LDUMAX", "LDUMAXA", "LDUMAXAL", "LDUMAXLB", "LDUMAX", "LDUMAXA", "LDUMAXAL", "LDUMAXLH",                             
 "LDUMA", "LDUMAX", "LDUMAXA", "LDUMAXL", "LDUMIN", "LDUMINA", "LDUMINAL", "LDUMINLB",                                 
 "LDUMIN", "LDUMINA", "LDUMINAL", "LDUMINLH", "LDUMI", "LDUMIN", "LDUMINA", "LDUMINL",                                 
 "LDUR", "LDURB", "LDURH", "LDURSB", "LDURSH", "LDURSW", "LDXP", "LDXR",                                               
 "LDXRB", "LDXRH", "LSL", "LSLV", "LSR", "LSRV", "MADD", "MNEG",                                                       
 "MOV", "MOVK", "MOVN", "MOVZ", "MRS", "MSR", "MSUB", "MUL",
 "MVN", "NEG", "NEGS", "NGC", "NGCS", "NOP", "opt", "ORN", "ORR", 
 "PACD", "PACDZA", "PACD", "PACDZB", "PACGA", "PACI", "PACIA171", "PACIAS",
 "PACIA", "PACIZA", "PACI", "PACIB171", "PACIBS", "PACIB", "PACIZB", "PRFM",                                           
 "PSB CSYNC", "RBIT", "RET", "RETA", "RETAB", "REV", "REV16", "REV32",                                                 
 "REV64", "ROR", "RORV", "SBC", "SBCS", "SBFIZ", "SBFM", "SBFX",
 "SDIV", "SEV", "SEVL", "SMADDL", "SMC", "SMNEGL", "SMSUBL", "SMULH",
 "SMULL", "STADD", "STADDLB", "STADD", "STADDLH", "STAD", "STADDL", "STCLR",
 "STCLRLB", "STCLR", "STCLRLH", "STCL", "STCLRL", "STEOR", "STEORLB", "STEOR",
 "STEORLH", "STEO", "STEORL", "STLLRB", "STLLRH", "STLLR", "STLR", "STLRB", 
 "STLRH", "STLXP", "STLXR", "STLXRB", "STLXRH", "STNP", "STP", "STR",
 "STRB", "STRH", "STSET", "STSETLB", "STSET", "STSETLH", "STSE", "STSETL", 
 "STSMAX", "STSMAXLB", "STSMAX", "STSMAXLH", "STSMA", "STSMAXL", "STSMIN", "STSMINLB",
 "STSMIN", "STSMINLH", "STSMI", "STSMINL", "STTR", "STTRB", "STTRH", "STUMAX",
 "STUMAXLB", "STUMAX", "STUMAXLH", "STUMA", "STUMAXL", "STUMIN", "STUMINLB", "STUMIN",
 "STUMINLH", "STUMI", "STUMINL", "STUR", "STURB", "STURH", "STXP", "STXR",
 "STXRB", "STXRH", "SUB", "SUBS", "SVC", "SWP", "SWPA", "SWPAL",
 "SWPLB", "SWP", "SWPA", "SWPAL", "SWPLH", "SW", "SWP", "SWPA",
 "SWPL", "SXTB", "SXTH", "SXTW", "SYS", "SYSL", "TBNZ", "TBZ",
 "TLBI", "TST", "UBFIZ", "UBFM", "UBFX", "UDIV", "UMADDL", "UMNEGL",
 "UMSUBL", "UMULH", "UMULL", "UXTB", "UXTH", "WFE", "WFI", "XPAC",
 "XPAC", "XPACLRI", "YIELD" };

Then, I'd update the reg function to return the appropriate number (0-31), plus a flag indicating if it were referred to as Xnn or Wnn (in most cases all the arguments to an instruction have to match size, except STXR, where the first one has to be a Wnn), and other flags for WZR/XZR and WSP/SP.

There appear to be 154 different formats of the part after the mnemonic (including nothing), but most of them are similar. There seem to be different types of constants as well:

Code: Select all

amount
imm
imm16
immr
imms
lsb
nzcv
op1
op2
pimm -- pattern immediate?
shift
simm -- signed immediate?
width

So you'd need a function like reg to read each of those, and code to recognise which form of instruction it is.

[jgharston]

Getting there....

Code: Select all

>DIM P% 100
>[nop
05781C04 D503201F             nop
>[adc r0,r1,r2
05781C08 1A020020             adc r0,r1,r2
>[adcs r3,r4,r5
05781C0C 3A050083             adcs r3,r4,r5
>[sbc r6,r7,r8
05781C10 5A0800E6             sbc r6,r7,r8
>[sbcs r9,r10,r11
05781C14 7A0B0149             sbcs r9,r10,r11
>[add r0,r1,#2
05781C18 11000820             add r0,r1,#2
>[adds r0,r1,#2
05781C1C 31000820             adds r0,r1,#2
>[sub r0,r1,#2
05781C20 51000820             sub r0,r1,#2
>[subs r0,r1,#2
05781C24 71000820             subs r0,r1,#2
>*Spool

[jgharston]

Code: Select all

// Mnemonics in here from the ARM documentation in UPPER case, assembler instructions in lower case                    
static char *mnemonics[] = {
 "ADC", "ADCS", "ADD", "ADDS", "ADR", "ADRP", "adrl", "align", "AND", "ANDS",                                          
 "ASR", "ASRV", "AT", "AUTD", "AUTDZA", "AUTD", "AUTDZB", "AUTI",
 "AUTIA171", "AUTIAS", "AUTIA", "AUTIZA", "AUTI", "AUTIB171", "AUTIBS", "AUTIB",                                       
 "AUTIZB", "B.cond", "B", "BFC", "BFI", "BFM", "BFXIL", "BIC",                                                         
 "BICS", "BL", "BLR", "BLRA", "BLRAA", "BLRA", "BLRABZ", "BR",                                                         
 "BRA", "BRAA", "BRA", "BRABZ", "BRK", "CAS", "CASA", "CASAL",
 "CASLB", "CAS", "CASA", "CASAL", "CASLH", "CAS", "CASP", "CASPA",                                                     
 "CASPL", "CA", "CAS", "CASA", "CASL", "CBNZ", "CBZ", "CCMN",                                                          
 "CCMP", "CINC", "CINV", "CLREX", "CLS", "CLZ", "CMN", "CMP",
 "CNEG", "CRC32", "CRC32", "CRC32", "CRC32X", "CRC32C", "CRC32C", "CRC32C", 
 "CRC32CX", "CSEL", "CSET", "CSETM", "CSINC", "CSINV", "CSNEG", "db", "DC", "dcb", "dcd", "dcs", "dcw",                
 "DCPS1", "DCPS2", "DCPS3", "DMB", "DRPS", "DSB", "EON", "EOR", "equb", "equd", "equq", "equs", "equw",                
 "ERET", "ERETA", "ERETAB", "ESB", "EXTR", "HINT", "HLT", "HVC",
 "IC", "ISB", "LDADD", "LDADDA", "LDADDAL", "LDADDLB", "LDADD", "LDADDA",
 "LDADDAL", "LDADDLH", "LDAD", "LDADD", "LDADDA", "LDADDL", "LDAPR", "LDAPRB",                                         
 "LDAPRH", "LDAR", "LDARB", "LDARH", "LDAXP", "LDAXR", "LDAXRB", "LDAXRH",
 "LDCLR", "LDCLRA", "LDCLRAL", "LDCLRLB", "LDCLR", "LDCLRA", "LDCLRAL", "LDCLRLH",                                     
 "LDCL", "LDCLR", "LDCLRA", "LDCLRL", "LDEOR", "LDEORA", "LDEORAL", "LDEORLB",                                         
 "LDEOR", "LDEORA", "LDEORAL", "LDEORLH", "LDEO", "LDEOR", "LDEORA", "LDEORL",                                         
 "LDLARB", "LDLARH", "LDLAR", "LDNP", "LDP", "LDPSW", "LDR", "LDRA",
 "LDRAB", "LDRB", "LDRH", "LDRSB", "LDRSH", "LDRSW", "LDSET", "LDSETA", 
 "LDSETAL", "LDSETLB", "LDSET", "LDSETA", "LDSETAL", "LDSETLH", "LDSE", "LDSET",
 "LDSETA", "LDSETL", "LDSMAX", "LDSMAXA", "LDSMAXAL", "LDSMAXLB", "LDSMAX", "LDSMAXA",                                 
 "LDSMAXAL", "LDSMAXLH", "LDSMA", "LDSMAX", "LDSMAXA", "LDSMAXL", "LDSMIN", "LDSMINA",
 "LDSMINAL", "LDSMINLB", "LDSMIN", "LDSMINA", "LDSMINAL", "LDSMINLH", "LDSMI", "LDSMIN",                               
 "LDSMINA", "LDSMINL", "LDTR", "LDTRB", "LDTRH", "LDTRSB", "LDTRSH", "LDTRSW", 
 "LDUMAX", "LDUMAXA", "LDUMAXAL", "LDUMAXLB", "LDUMAX", "LDUMAXA", "LDUMAXAL", "LDUMAXLH",                             
 "LDUMA", "LDUMAX", "LDUMAXA", "LDUMAXL", "LDUMIN", "LDUMINA", "LDUMINAL", "LDUMINLB",                                 
 "LDUMIN", "LDUMINA", "LDUMINAL", "LDUMINLH", "LDUMI", "LDUMIN", "LDUMINA", "LDUMINL",                                 
 "LDUR", "LDURB", "LDURH", "LDURSB", "LDURSH", "LDURSW", "LDXP", "LDXR",                                               
 "LDXRB", "LDXRH", "LSL", "LSLV", "LSR", "LSRV", "MADD", "MNEG",                                                       
 "MOV", "MOVK", "MOVN", "MOVZ", "MRS", "MSR", "MSUB", "MUL",
 "MVN", "NEG", "NEGS", "NGC", "NGCS", "NOP", "opt", "ORN", "ORR", 
 "PACD", "PACDZA", "PACD", "PACDZB", "PACGA", "PACI", "PACIA171", "PACIAS",
 "PACIA", "PACIZA", "PACI", "PACIB171", "PACIBS", "PACIB", "PACIZB", "PRFM",                                           
 "PSB CSYNC", "RBIT", "RET", "RETA", "RETAB", "REV", "REV16", "REV32",                                                 
 "REV64", "ROR", "RORV", "SBC", "SBCS", "SBFIZ", "SBFM", "SBFX",
 "SDIV", "SEV", "SEVL", "SMADDL", "SMC", "SMNEGL", "SMSUBL", "SMULH",
 "SMULL", "STADD", "STADDLB", "STADD", "STADDLH", "STAD", "STADDL", "STCLR",
 "STCLRLB", "STCLR", "STCLRLH", "STCL", "STCLRL", "STEOR", "STEORLB", "STEOR",
 "STEORLH", "STEO", "STEORL", "STLLRB", "STLLRH", "STLLR", "STLR", "STLRB", 
 "STLRH", "STLXP", "STLXR", "STLXRB", "STLXRH", "STNP", "STP", "STR",
 "STRB", "STRH", "STSET", "STSETLB", "STSET", "STSETLH", "STSE", "STSETL", 
 "STSMAX", "STSMAXLB", "STSMAX", "STSMAXLH", "STSMA", "STSMAXL", "STSMIN", "STSMINLB",
 "STSMIN", "STSMINLH", "STSMI", "STSMINL", "STTR", "STTRB", "STTRH", "STUMAX",
 "STUMAXLB", "STUMAX", "STUMAXLH", "STUMA", "STUMAXL", "STUMIN", "STUMINLB", "STUMIN",
 "STUMINLH", "STUMI", "STUMINL", "STUR", "STURB", "STURH", "STXP", "STXR",
 "STXRB", "STXRH", "SUB", "SUBS", "SVC", "SWP", "SWPA", "SWPAL",
 "SWPLB", "SWP", "SWPA", "SWPAL", "SWPLH", "SW", "SWP", "SWPA",
 "SWPL", "SXTB", "SXTH", "SXTW", "SYS", "SYSL", "TBNZ", "TBZ",
 "TLBI", "TST", "UBFIZ", "UBFM", "UBFX", "UDIV", "UMADDL", "UMNEGL",
 "UMSUBL", "UMULH", "UMULL", "UXTB", "UXTH", "WFE", "WFI", "XPAC",
 "XPAC", "XPACLRI", "YIELD" };

Yes. That! ^^^^^^^^

[Stoppers]

[/quote]
Yes. That! ^^^^^^^^
[/quote]
Are you interested in a collaboration?

Have you worked out how N:immr:imms works, yet? I've punted on that one, and just put in a dummy routine for the time being.

[Stoppers]

I think I may have asked this before, but would anybody be able to write (or at least help me write) a 64-bit ARM assembler suitable for use with BBC BASIC?

By the way, Richard, your code is really nice to work with!