ArcDVI, Archimedes DVI/HDMI output

[anightin]

Excellent to see this project rolling again!

Safe travels with work

Best wishes

Andy

[Iggypop]

Great stuff !!

[Mattmos]

Excellent to see this project rolling again!

Safe travels with work

Cheers Andy. In case I get lost, here're the Kicad projects (awkwardly named as there's a repo for each of 3 boards now):

https://github.com/evansm7/ArcDVI-PCB-main
https://github.com/evansm7/ArcDVI-PCB-VIDC
https://github.com/evansm7/ArcDVI-PCB-VIDC-skt

Haven't yet updated the corresponding -hw repo with new pinouts for the FPGA/DVI TX (nor -fw), but aside from configuring the output chip the main logic's the same. Will hack that once I've built a board up. I'm missing a couple of special resistor values and about 3 spare days before I leave tomorrow, annoying as the boards are back and I want to try them out! More when I have it.

Matt

[Mattmos]

Hola, just a quick update. The GitHub repos for the FPGA Verilog and the MCU firmware are now up-to-date and support the v2 boards. FSVO works, but it works!

This shows the main board (but with an extra backplate, as would go in an A440) attached to the A3000 push-on VIDC board:

It's about as reliable a fit as you'd think, and pops off if you sneeze; some filing of the socket may help, as would a clamp. The L-shaped board would have the main board bolted on top, and both then fit under the FDD.

But otherwise, it's running. Here's a MODE 23 BASIC "draw stuff" thingo:

Then here's the interposer-style board in my (dusty) R140, which has VIDC plugged in the top (eee scary), and itself plugs into the VIDC socket:

This then fits neatly underneath the main board, mounted in the podule slot via a backplate. You'd think in this modern day of CAD this wouldn't have been quite so big a surprise to me as it was, but hey. Will need some FFC origami to make neat:

In the 4 mins I had spare tonight to test the second form, it didn't work. (The R140 hasn't been powered up in a while and has some other issues, but I expect this is just a bad connection somewhere.)

With perseverance someone brave can recreate this from the Github repos today; but I'll figure out how to get from here to kits/boards.

[IanJeffray]

Supermagic! I'm guessing the interposer version would fit the 3K if it had a socketed VIDC?

Is the FPGA going to cope with a 36MHz VIDC? (i.e. A5000 / VIDCEnhancer) - I notice you've only the original "Arabella" there.

I've been trying to figure out why A3000 in general appears to have softer video than other models and couple of my A3000 have particularly soft output even for A3000s, so conversion to DVI crispness would be supersmashing.

[Mattmos]

Supermagic! I'm guessing the interposer version would fit the 3K if it had a socketed VIDC?

It doesn’t quite; it’ll bash into the FDD support posts. There are assembly drawings in the A3K kicad board file which show the relative positions of the posts, VIDC, reset button etc.

It’ll need a new PCB but the existing A3K one can be modified for a socket on top.

Similarly, needs testing if the A3K push-on will fit A5K. I aimed to and sized it from photos so it _should_.

Is the FPGA going to cope with a 36MHz VIDC? (i.e. A5000 / VIDCEnhancer) - I notice you've only the original "Arabella" there.

I’ll get you main/A3K/Axx0 boards, and your varied collection can be put to work to see what happens!

VIDC enhancer is a great question and not solved today; for machines with an aftermarket one I reckon it’s better to remove it. It’s just a “faster refresh” game, and modern monitors will nicely display a low refresh anyway. Unless someone really wants a faster screen draw (and lots more bandwidth used) maybe?

For native-enhancer machines clearly we’d need to support it. (And optionally redefine stock modes to leave the clock at 24MHz, better perf.) The FPGA will cope, and the design might do something sensible as-is, but easiest to fix when one is in an A5000. (The PLL parameters should be tweaked when input changes, but Probably Fine at first whiff.) There may be some fettling of DMA sampling window too on 12MHz machines too.

All doable!

[IanJeffray]

For native-enhancer machines clearly we’d need to support it.

Or we soft-fettle them down to 24MHz only. Re-implementing all the "desktop" modes (anything with XEIG=1, IMO) to be slow-refresh would bring performance advantages anyway on all machines. That leaves the other modes which are basically all 24MHz anyway I think.

Using ColourCard at "low" refresh has never really bothered me, but the improved processing performance (due to more RAM bandwidth being available to the CPU) is noticable, so this is desirable.

The flip-side of the question is just one of being able to play with pushing the machine to its limits - with 36MHz being required for MODE31 (or even MODE32).

[iomanoid]

This kinda thing is what I want for my next-level initiation; I don’t think I’ve ever used an Arc beyond mode 12/15/similar constraints. My mate Steve had some sort of multiscan monitor back in the day that was actually frightening

[IanJeffray]

Matt provided parts a couple of months ago, and it's taken me this long to get it built and running. But run it does. Wow!

Crispysharp A310 !!

The elusive MODE 23

[TimoHartong]

Hello if you plan a production run can you put me on the list ?.

[Daveo]

Add me to list too. I have a RiscPC700 and would love to have DVI output instead of VGA.

[IanS]

Add me to list too. I have a RiscPC700 and would love to have DVI output instead of VGA.

RiscPC != Archimedes, this only works on machines with a discrete vidc chip (A3xx, A4xx, A540, A3000)

[IanJeffray]

this only works on machines with a discrete vidc chip

I can't think of a reason it couldn't work on VIDC20. Trickier to fit, sure.

[IanS]

this only works on machines with a discrete vidc chip

I can't think of a reason it couldn't work on VIDC20. Trickier to fit, sure.

Wouldn't it need to pick up another 32 bits of data for the upper and lower data bus? (Assuming you wanted use 2MB Vram modes)

[IanJeffray]

this only works on machines with a discrete vidc chip

I can't think of a reason it couldn't work on VIDC20. Trickier to fit, sure.

Wouldn't it need to pick up another 32 bits of data for the upper and lower data bus? (Assuming you wanted use 2MB Vram modes)

Yep. And in fact, you've probably solved a good chunk of the issue with how to connect it, right there - create a VRAM-interposer.

[Mattmos]

Yep. And in fact, you've probably solved a good chunk of the issue with how to connect it, right there - create a VRAM-interposer.

Patches welcome!

[IanJeffray]

I built up another ArcDVI today (thanks Matt!) this time as an A3000 "clip on" version. It's not practicable, IMVHO - it just pops off at the slightest moment and I think even if it was mechanically jammed in under the floppy drive, it's just not the right solution - better to slightly tweak the other interposer board so that it will fit under the drive (it almost does already) and then replace VIDC with a socket.

What I'd not done previously, though, was test it alongside a VIDC enhancer. We're aware there are "issues" on A540 (12MHz RAM) but I think it was still an open question as to whether it would operate at 36MHz? Anyway - I've shown it does - MODE 31 running on an A3000 with VIDC Enhancer 'overclocking' the VIDC - all good.

[pir]

Any chance of this working on an A5000 or will it have the same clip-on issues?

[IanJeffray]

Any chance of this working on an A5000 or will it have the same clip-on issues?

It will have the same issues as the A540 presently does (tearing at mouse pointer) and yes will have the same clip issues. But it should be possible to replace VIDC with a socket. This is still a 'work in progress' on my long list..

[TimoHartong]

Any plans to sell some prints ?. This is so nice project. I really love to have some in my Acorn Archimesses..

[IanJeffray]

Any plans to sell some prints ?. This is so nice project. I really love to have some in my Acorn Archimesses..

It's all opensource as per above links. I'll be forking and including my board layout changes, but I don't plan on making any for general sale.