Issue 3 Beeb and ROM boards

[Boydie]

Evening.

I thought I'd had this working previously, but I may be misremembering...

I'm trying to get a sideways ROM board to work in my Issue 3 BBC. I've tried both a Watford 12-socket and ATPL Sidewise (each with a different OS ROM, so that's ruled out). Both give the Language? error.

Both boards work fine in an Issue 4 machine. Link options would appear to be the same.

I've replaced the OS and ADC sockets with nice new turned-pin ones, but no difference,

Moving BASIC to a motherboard socket doesn't make any difference if the ROM board is controlling S21. If I then refit the original link to S21 then it'll work fine, even if the ROM board is still fitted, so presumably that excludes an issue with the OS socket on either the motherboard or ROM board.

Any suggestions what to try next? I'm guessing it must be an issue with the board itself, since two ROM boards exhibit the same problem and both work fine in another machine?

[Ukwebb]

Do you have the s21 jumper wires the right way round on the pins?

[Boydie]

Do you have the s21 jumper wires the right way round on the pins?

Yeah. Same way round on both the Issue 3 and 4 boards - works fine on the 4, not the 3.

Also tried reversing, just in case there was a major change between how the two issues are wired - no change.

[Boydie]

Different power supply hasn’t helped either (didn’t think it would, but anyway)

The two ROM boards also differ in how they power the rest of the board. ATPL appears to use the ADC socket (hence the warning in the manual that an incorrect insertion into IC73 can cause Language?), whereas Watford seems to use the OS socket and the ADC is purely pass-through and a convenient fixing point.

[Ukwebb]

Think they both use the adc socket to pick up the read/not write signal for the swram too

[maniacminer]

Which pins of S21 are you using? I vaguely remember that board used the south-most pair of pins and the north-most pair had a link fitted. S22 & S20 must be north.

[Boydie]

The south pair - they work fine in the Issue 4 board, but the identical setup fails on the Issue 3. I can get both expansion boards to work, just not on the one machine I want them to. Getting them to work at all is not an issue - I borrowed the Watford board from another machine for testing purposes because I already had it working.

If I’ve read around the subject properly, the ROM boards use pins 1 and 27 of IC51 (since they plug into that socket) to read A14 and A15 to select the correct socket on the board?

Since these lines aren’t used as standard for selecting the motherboard sockets (unless expanding them to take 32K or 64K EPROMs), presumably there could be a fault in A14 or A15 (so IC76 pins 11 or 12) or their connections to IC51 which wouldn’t manifest if the system didn’t have a ROM board fitted (ie the south link is fitted across S21). This would replicate what I’m finding as they’re not needed in an unexpanded ststem.

So I should be looking at IC76 pins 11 and 12 - outputs and connections to IC51?
Thinking further, if either A14 or A15 is stuck then the motherboard sockets can never be selected because the ROM board’s logic will always direct to sockets on the board (particularly since the presence of a board remaps the motherboard sockets to 0-3 instead of 12-15).
Wonder if this means that 4 sockets on the board are active and usable (depending on which ROM select lines are stuck), but I’ve not yet put a language ROM in any of them…

[maniacminer]

I'm sure the motherboard sockets still work, as ROMSEL is a 4 bit value, so there are 16 available ROMs, 12 on the ROM board and 4 on the motherboard. Try adding another ROM to the Issue3 board without the ROM board present.

[Boydie]

My point exactly, and it’s exactly what I’m observing.
If S21 is bridged, the motherboard sockets work fine. If S21 is under ROM board control, the motherboard sockets don’t get seen either, presumably because the ROM board never activates them via S21.
This would happen if the ROM board were being given duff ROM select data via A14 and/or A15 (one being stuck high/low, whichever is appropriate) so it always thinks the required ROM is on itself.
I’m working today so can’t test the theory, but tomorrow I’ll wire a motherboard socket to take a 64K EPROM as I have on other machines and see if it recognises all 4 images. And check pins 1 and 27 on IC51 actually receive the ROM select data.

Addendum:
Just had a closer look at the back of the board. It seems to have had a lot of work done previously, with tons of flux residue around IC76 (!), also IC81, IC18, and IC12.
Also the traces to pins 17 & 18 on IC3 have been cut and swapped over on the back - what's that about? Is it a known Issue 3 thing that was corrected on later boards or should it be reversed?

[maniacminer]

My point exactly, and it’s exactly what I’m observing.
If S21 is bridged, the motherboard sockets work fine. If S21 is under ROM board control, the motherboard sockets don’t get seen either, presumably because the ROM board never activates them via S21.
This would happen if the ROM board were being given duff ROM select data via A14 and/or A15 (one being stuck high/low, whichever is appropriate) so it always thinks the required ROM is on itself.
I’m working today so can’t test the theory, but tomorrow I’ll wire a motherboard socket to take a 64K EPROM as I have on other machines and see if it recognises all 4 images. And check pins 1 and 27 on IC51 actually receive the ROM select data.

Addendum:
Just had a closer look at the back of the board. It seems to have had a lot of work done previously, with tons of flux residue around IC76 (!), also IC81, IC18, and IC12.
Also the traces to pins 17 & 18 on IC3 have been cut and swapped over on the back - what's that about? Is it a known Issue 3 thing that was corrected on later boards or should it be reversed?

Check IC20 specifically, pins #4,#5,#6,#7 (active low, so none should be low at the same time) same with pins #9,#10,#11,#12 then check the outputs of IC76 with and without the ROM board fitted. I would also check with the Service Manual that the modifications from a Model A->B have been done.

Regarding the IC3 mods, the Issue 1->3 boards have a fault where pins #16 and #17 are backwards for the Speech System - also you might notice some bodgery around IC98 as someone messed up and connected the GND pin to its neighbouring +5V pin (so expect a cut between pin#13 and pin#14 of IC98 and pin #13 connected to GND via a bodge wire.

[Boydie]

Okay…

Without rom board:

IC20:

4 hi
5 hi
6 fast pulse
7 medium pulse
9 hi
10 hi
11 hi
12 hi

IC76:

11 hi
12 hi

IC 51:

1 slow pulse
27 slow pulse

All the pulsing pins go hi whilst break is pressed, with the exception of IC20 pin 7, which usually goes hi but occasionally drops to a slow pulse

With rom board (same for either board):

IC76:

11 hi
12 hi

IC51:

1 very fast pulse
27 very fast pulse
Both of these go lo whilst break is pressed

S21 lower pins both permanently hi


For comparison, with a ROM board in the Issue 4, pins 1 and 27 on IC51 flash at the same rate as they did on the morherboard (still go lo when break is pressed).

[Boydie]

Okay, so it’s getting odder.

I’ve just wired the motherboard sockets to IC76, so they can take 64k ROMs.
All 4 ROM images on a 64k chip can be seen in any of the four sockets. Can’t comment on whether it can simultaneously see 4 images in all 4 slots, but it copes fine with 1x64k and 3x16k, so I suspect the answer is yes.

So it would appear that ROM selection is working in itself, and the only positive finding so far is that A14 and A15 on the OS ROM go berserk when a ROM board is fitted.

[Boydie]

Looking in the Service Manual, several new links were introduced in Issue 4 boards to allow the use of external ROM boards.
On an Issue 3, these are resistors rather than links, but otherwise superficially appear to do the same thing.

Would it be safe to try shorting these resistors out?

[Boydie]

Tried shorting the resistors out - machine won’t boot at all; short boop, no bip.

Time to give up and wire the motherboard for 64k chips instead…