- store word;
- with the value from r11;
- to address as per r11 with offset 10h added;
- preindexed, with write back.
Given the data sheet's claim that "Data transfer instructions (LDR, STR) are aborted as though the instruction had not executed", questions prompted:
- does preindexed write back imply that if r11 is initially 0h then 10h will be written to [10h], or will the write back not occur until after the store?;
- if the former, does that imply some sort of special case is implemented in silicon given the need either not to update r11 in the register file until the transfer is complete, or else the need to restore the original value in case of a data abort?
[minor addendum: I appreciate this isn't especially close to the remit for "32-bit acorn hardware" but it's a lot closer than to the other "32-bit acorn" sections, so apologies for that]